PGA305: Current output variation

Hi, 

Welcome to E2E! Can you please share more information about your setup:

• Can you please share the EEPROM values used?
• Does this issue occur with one device, or have you seen it across multiple devices? If you've seen it across multiple devices, approximately what percentage of devices are affected?
• If possible, can you please share a schematic of the PGA305 output?
• What communication protocol are you using with the device? I2C or OWI?
• What are the clamp values you have set on the output?
• Is this offset consistent across the range? For example, if you expect a 10mA output, do you see an 8.5mA output or something else?

Thanks,

Maggie

Hi Maggie,

Thank you for your reply. I apologize for the lack of detail in my previous information.

After soldering the PGA305 and other electronic components onto the board, we perform electrical testing. During this process, we input the hexadecimal value 2760, which corresponds to a DA instruction of approximately 20mA, to verify the current output.

Below are my answers to your questions.

•  Can you please share the EEPROM values used?

⇒ I’ve attached a file named “EEPROM.JPG.”

•  Does this issue occur with one device, or have you seen it across multiple devices? If you've seen it across multiple devices, approximately what percentage of devices are affected?

⇒ I have observed variations in output current depending on the production lot of the PGA305. A photo titled “Photo of the production lot of PGA305” is attached for your reference. Using the DAC code “0x2760,” the output current is 20 mA for lot AOSC and 18.5 mA for lot A3VY. These values represent the average of approximately 100 samples for each lot.

•  If possible, can you please share a schematic of the PGA305 output?

 ⇒ The output circuit of the PGA305 is configured as shown in Figure 47, “4-mA to 20-mA Output With Internal Sense Resistor Diagram,” in the datasheet.

•  What communication protocol are you using with the device? I2C or OWI?

⇒ I am using I²C.

•  What are the clamp values you have set on the output?

 ⇒ I have not set any clamp values on the output.

•  Is this offset consistent across the range? For example, if you expect a 10 mA output, do you see an 8.5 mA output or something else?

⇒ The offset is not consistent across the range. For example, when a 12 mA output is expected, I observe an average output of approximately 11.1 mA, which represents a deviation of about 7.5% below the expected value.

I understand that the final output is adjusted by the compensation function of the PGA305. However, I would like to know how much the output current varies in response to the DAC command values before compensation is applied. I am also interested in understanding the final output current that can be achieved in the actual product. As I understand it, the DAC output is 1.25 V, so I assume the output current can be calculated as: 1.25 V × Gain / 40 Ω. I believe that if I can obtain the variation data for the gain and the 40 Ω resistor, I will be able to evaluate the output more accurately.

Best regards, Fumihiro

Hi Fumihiro,

Thank you for sharing that information, it's very helpful. 

Would you mind sharing the EEPROM data from this page of the GUI? I apologize, I was not more specific when asking to see your EEPROM. Is the EEPROM read from this page the same across all devices?

Based on what you shared, it sounds like you are using the DAC Settings page to write outputs to the DAC. Please correct me if I'm wrong.

When you do this, the value you write does not go through the compensation loop:

So only the DAC gain is factored into the output current. However, when you are operating the device in current mode, there should be no DAC gain: 

The equation to calculate the current output is as follows:

So, for a DAC code of 0x2760, you should be expecting a 19.2mA output - that indicates ~4% error for both lot codes. 

Unfortunately, I don't have accuracy specifications for the DAC. The PGA305 datasheet states that the PGA305 has <0.1% full-scale accuracy, however, this takes calibration from the compensation algorithm into account. 

I am inquiring internally about the lot codes you shared. 

Thanks,

Maggie

Hi Maggie,

Thank you for your reply.

・Would you mind sharing the EEPROM data from this page of the GUI?

⇒I’ve retrieved the EEPROM data again, and I’ll attach it here.

・Is the EEPROM read from this page the same across all devices?

⇒The written values are the same across all devices.

・Based on what you shared, it sounds like you are using the DAC Settings page to write outputs to the DAC. When you do this, the value you write does not go through the compensation loop:So only the DAC gain is factored into the output current. However, when you are operating the device in current mode, there should be no DAC gain:

⇒Thank you for the detailed explanation. I’m using the DAC Settings page to observe the DAC output, and I understand that the compensation loop is not active in this case. At this stage, I’m inputting the expected DAC values and measuring the output current to confirm whether the PGA305 and other electronic components have been properly soldered onto the board.

・So, for a DAC code of 0x2760, you should be expecting a 19.2mA output - that indicates ~4% error for both lot codes.

⇒ I also understand that a DAC code of 0x2760 corresponds to an expected output of 19.2 mA, and I’m aware that 0x28F5 yields approximately 20 mA. However, when I set the DAC code to 0x2760, the output current was 20 mA for the AOSC lot, whereas it was 18.5 mA for the A3VY lot—indicating a discrepancy of about 7.5%.

What I’m trying to understand is how much the output current can vary when the same expected DAC value is applied, without the compensation loop—in particular, due to variability within the same lot or across different lots. I’d like to know the precision of the DAC itself as well as the variability of surrounding components such as the 40kΩ and 40Ω resistors. To be clear, I’m not suggesting that the 7.5% deviation is necessarily large—I’m trying to understand what level of variation is typical in the hardware, which I can then use as a reference to evaluate whether soldering was performed properly. Apologies if I’m repeating myself.

Best regards, Fumihiro

Hi Maggie,

In my initial question, I mentioned an offset error, but as you correctly pointed out, it’s actually a gain error. I also understand that this can be resolved through calibration. I would like to determine what range of output current values can be considered normal at the SUB-ASSY stage. For example, when the DAC code is 0x28F5 and the expected output is 20 mA, it would be helpful to define what range is acceptable as a normal value. Is there any reference data available for this?

Also, thank you for investigating the two lot numbers—I feel reassured to know that there were no issues.

Thanks,

Fumihiro