IWR6843AOPEVM: Question about true ADC sampling depth

Tool/software:

Hi,

My current setup is a DCA1000EVM and an IWR6843AOPEVM. I would like to evaluate the effect of quantization noise on the radar signal received. However, that means I would need to know some specifics about the ADC used. I'm assuming the ADC that is built in is a delta-sigma ADC and the IWR6843AOP datasheet states that the RF frontend has a 12-bit ADC. However, I have found that the radar data contains samples with much higher values than a 12-bit ADC would allow. So, I'd like to ask some about more concrete parameters about this ADC like the oversampling ratio (or a fixed sampling rate), the order of the delta-sigma ADC, the type of decimating filter being used, etc. If the ADC isn't a delta-sigma ADC, could you please tell me what architecture it uses and the parameters used? Thank you.