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AWR1843: QSPI flash address and write problem

Part Number: AWR1843

Tool/software:

Hi team,

I have below problem from my customer

1.

#define SOC_XWR14XX_MSS_EXT_FLASH_BASE_ADDRESS        0xC0000000U
There is an address offset when accessing flash. I believe this is a way to manage a uniform address space, but when I check the QSPI driver, I find the address with offset is written in SPI register directly.
The flash address is started with 0x0, so there should be a mechanism to eliminate the address offset 0xC0000000U. But when I check the TRM, I don't find this.
Please help explain the mechanism, thanks.
2.
The single_write function doesn't return value. So how to make sure this function is executed as our expectation? Like the single_write is operating the register and writing byte with correct manner?
Regards,
Shawn