Hello Experts,
We are using the TDC7200 in mode 2 to "timestamp" events using some external circuitry. The TDC7200 clock runs at 10 MHz so there is a 100 ns period for CLOCK1.
I would expect to see the TIME1 value range from near 0 to about 1819 to represent the range from where the START event occurs virtually coincident to a 100 ns clock edge, to the time where START happens immediately after a clock edge and the ring oscillator has to run for 100 ns.
In our testing, we see a range more like 113 minimum (about 6 ns) to 1900 maximum (about 106 ns). Is that 6 ns offset due to silicon delays? To get a true time of flight, should we offset the calculation by 6 ns? Or is there something else going on?
I am asking because we see a small "sawtooth" effect when CLOCK1 increments, as if the range between 100 ns ticks is not being evenly filled by the ring counter TIME1 value.
Can you provide any insight about this?
Regards,
John Ackermann
