AWR2188EVM: chirp ram LUT data ordering

Hi, 

I'm writing a chirp ram LUT for 1024 chirps for parameters IDLE_TIME, TX_ENABLE, and TX0 to TX7 phase codes. 

Are there any chirp RAM rules like certain order of data, space between data or dedicated memory regions? 

When I order my data: 

h_ChirpParamLutOffset = { 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_PROFILE] = 0x0, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_IDLE_TIME] = 0x100, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX_ENABLE_MASK] = 0x100 + 1024 * 2, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX0_PHASE] = 0x100 + 1024 * 3, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX1_PHASE] = 0x100 + 1024 * 4, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX2_PHASE] = 0x100 + 1024 * 5, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX3_PHASE] = 0x100 + 1024 * 6, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX4_PHASE] = 0x100 + 1024 * 7, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX5_PHASE] = 0x100 + 1024 * 8, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX6_PHASE] = 0x100 + 1024 * 9, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX7_PHASE] = 0x100 + 1024 * 10, 

}, 

 
I see some defect chirps (random phase around chirp no. 780) 

But when I use the same script and order the data ... 

h_ChirpParamLutOffset = { 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_PROFILE] = 0x0, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_IDLE_TIME] = 0x100, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX0_PHASE] = 0x100 + 1024 * 2, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX1_PHASE] = 0x100 + 1024 * 3, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX2_PHASE] = 0x100 + 1024 * 4, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX3_PHASE] = 0x100 + 1024 * 5, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX4_PHASE] = 0x100 + 1024 * 6, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX5_PHASE] = 0x100 + 1024 * 7, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX6_PHASE] = 0x100 + 1024 * 8, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX7_PHASE] = 0x100 + 1024 * 9, 

[xWR2188.MMWL.M_ML_SENSOR_CHIRP_LUT_INDEX_TX_ENABLE_MASK] = 0x100 + 1024 * 10, 

}, 

… everything is fine. 

Here are the good and the bad mmwavestudio logs.

Any idea what is wrong?

Regards,
Stefan

ram_defect_Log0815_0.txt 

ram_ok_Log0816_0.txt