There seem to be a few missing details in the data sheet. First, I cannot get the frequency counter to run at tank frequencies of 25 -30 Khz, the count register is off by a factor of 4 to 10. Based on the formulas given to derive frequency from the 24 bit count data, I am guessing the counter counts up at 1/3 the external clock frequency for 'LDC response time' cycles of tank oscillation, and then holds that as the 24 bit frequency data. Is this correct ? there is no clear explanation in the data sheet. Are there situations where a better ( or only possible) frequency measurement requires a lower external clock frequency than the 6 Mhz on the EVM ?
Second, is there an approximation for the ideal filter cap value or is cut and fit the only way to tune the LDO ? At 28 Khz, I tried 100 pF thru .05 uf in decade steps. At .01, the filter waveform was at 1 VAC amplitude, but I still had no good frequency counting .
And third, doesn't the approximation for the Rs => Rp transformation impose some limitations on the ratio of the tank L and C ? Are there limits to that ratio ? I tried a 3 mH coil with a .01 cap, for an oscillator frequency of about 28 Khz. I am inclined to try use a 500 pF cap but am concerned about having an "unbalanced" LC combination.
On the surface, the chip is indeed amazing in its sensitivity to metal surface area and proximity. We are trying to sense ferrous material flow rate, and although the chip looks very promising the data sheet does not seem to provide a lot more than a cookbook approach, and offers few alternatives when things aren't working or tools to evaluate margins of error for a final design . Any answers out there ?
