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OPT8241 - No LVDS Clock Output

Other Parts Discussed in Thread: OPT8241, OPT9221

We are not getting a 300MHz LVDS clock from the OPT8241 sensor to the OPT9221 controller. Everything else appears to be running OK. 

Ideas and suggestions would be welcome.

David

  • Could you confirm that the voltages to the OPT8241 voltages are okay? Is the OPT9221 providing a 24 MHz signal on OP_CLK?

    Are you doing a controlled external reset of the OPT9221 after startup? Could you check the behavior with the VMIX rail turned off and with a controlled external reset to OPT9221?
  • Hi Anand,

    The voltages look OK. We have now found that the LVDS clock does lock prior to enabling capture. When we start capture (TG_DIS to 0) the LVDS clock's lock is lost again. Any thoughts on what might be causing that?

    Thanks,

    David and Oli

  • David,

    Okay, what about the 24 MHz output clock? Does it remain stable when the LVDS lock is lost?

    Could you confirm the reset sequence and the behavior with VMIX supply turned off?
  • The output clock (OP_CLK) sits at 24MHz even when LVDS lock is lost. We can successfully control this down to 12Mhz using the OP_CLK_FREQ register setting.

    Our reset sequence is such: We hold the reset pin (RESET_Z) LOW for 500ms after the firmware is uploaded to the TOF controller.

    With the VMIX supply off, the LVDS lock is still lost once capture is started.
  • David,

    Could you share your register initialization sequence to turn on capture?

    Do you get back the LVDS lock if you set slave 0x58 register 0x00 Bit 0 to 1? (This resets the OPT8241).
    Could you also readback slave 0x5C register 0x63 before and after you lose the LVDS lock?