TDC7201: about TDC7201 SCH design

Vera Mao

Expert 5065 points

Part Number: TDC7201

hi dear supporting team,

my customer is drawing the sch of TDC7201, they have below questions:

1. should they add 36.5 ohm resistor on the connection btw start1/start2, stop1/stop2 and FPGA?

2. What's the function of R16 in our reference design SNAU198A?

3. there is 50 Ohm pull down at J4,J5,J7 and J8 , is it for impedance matching for long cable?

over 8 years ago

0 Scott Cummins over 8 years ago

TI__Mastermind 31655 points

Hi Vera,

1. This depends on the current expected on the line. The maximum input current on these pins is 5mA. A current limiting resistor may be necessary if the output of the FPGA allows for greater currents.

2. In this EVM's case, only one of the TDCs will be outputting data at a time, so the two SPI output lines are shorted so only one pin needs to be used on the MSP430.

3. Yes, this is for impedance matching.

0 Vera Mao over 8 years ago in reply to Scott Cummins

TI__Expert 5065 points

hi Scott,

one more question:

could TDC 16M clk use LVDS swing? customer want to use 3.3V LVDS clk converted from DIFF to SE through transformer, is it ok?

0 Scott Cummins over 8 years ago in reply to Vera Mao

TI__Mastermind 31655 points

Hi Vera,

This should be fine as long as they convert to single ended.

Regards,

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TDC7201: about TDC7201 SCH design