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PGA450-Q1: time of flight about SAT_TIME

hunt.cn
Prodigy 145 points
Part Number: PGA450-Q1

Hi ,Akeem,

sorry for post again, I need some message.

My code sequence is your mention ,  not changed  codes sequence in the original <example pga450_main.c>, but some issues in my test.

1、 TOF calculation equation without SAT_TIME ,  but it had good accuracy。

I added one code to read SAT_TIME after <code> EN_CTRL = 0x0C </code> ,  and throw it out by UART ,  it 's value is 0 .

So SAT_TIME does not offset the FIFO record start time too , That is why the equation have good accuracy whitout add SAT_TIME to the TOF equation.

2、Why SAT_TIME had a zero value .

it seem to be impossible,  because there had a  code like  :

SAT_DEGLITCH = 0x09;                   // 2us per count || 1/58kHz (17.2uS)

So SAT_TIME should have 1 value at least.        //  8bit at 16 us resolution

Am I do this right?

3、I got a picture with PGA450Q1EVM GUI 1.50.1 , maybe why SAT_TIME = 0.

configure GUI 1.50.1 : in Digital Test MUX set GPIO1 to output SAT_DONE 

ch1 is burst waveform , ch2 is SAT_Done from gpio1.

  • 0
    TI__Mastermind 27950 points
    hunt.cn,

    When working as intended, SAT_DONE (Ch2) should not be toggling as depicted on your oscilloscope capture. Instead, SAT_DONE should only flag high once, and remain high after the deglitch timer reaches the programmed deglitch time set in the SAT_DEGLITCH register. The captured deglitch timer (SAT_TIME) and SAT_DONE flag should only reset to '0' when the SAT_EN bit is set to '0'.

    Have you tried extending the SAT_DEGLITCH time, or increasing/decreasing the saturation threshold?

    Do you intend on using the saturation timer exclusively for diagnostic purposes, or do you intend on waiting until the saturation timer and check are complete before starting the FIFO capture?

    Are you using the default values provided in the demo code? If not, can you provide the values you intend to use for registers:
    • CONTROL_1 register — set the saturation threshold with the SAT_SEL1 and SAT_SEL0 bits
    • SAT_DEGLITCH register (the saturation deglitch time register) — 8 bits at 2 μs resolution