Other Parts Discussed in Thread: AFE58JD18
I would like to ascertain what transceiver lanes are used in the FMC interface for the AFE58JD18EVM. I would like to be planning hardware. I thought I would take a look at the details for TSW14J56 but I see all 10 lanes are populated so I did not get any additional information there. Could someone provide me with a schematic or at least what lanes (and IO) are used on the FMC connector?
I would like to use the Xilinx ZC706 board to interface with AFE58JD18EVM, and it has lanes 0-7 populated on the HPC-FMC connector.
