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AWR1243: clock/sync pins for cascading

Part Number: AWR1243

Hi,

Could you please clarify the difference between the following signals of AWR1243:

  • FMCW_CLKOUT (pin B15)
  • FMCW_SYNCOUT (pin D1)
  • SYNC_OUT (pin P15)
  • OSC_CLKOUT (pin A14)

  1. What each signal is used for?
  2. What frequency each of the signals runs on?
  3. Consider SWRS188 document, section 6.3.1.1 Clock Subsystem, figure 6-1 (page 28). There are some signals which are present on Fig 6-1, but absent from schematics on Fig 7-2 (page 33): FMCW_CLK_IN, REFOUT, "SoC Clock". What are the correct names?
  4. In case of cascading, which master pin should be connected to which slave pin?
  5. In case of cascading, are the connections done using traces only or additional components are required?
  6. In case of cascading, do CLKP/CLKM of master and slave require special treatment?

Thanks.

  • Hello ,
    FMCW_CLKOUT and FMCW_SYNCOUT are the 20Ghz LO sync signal outputs from the master device . There are two pins provided for the same signal to ease the routing on the PCB from the master to the slave. These two pins are placed on opposite side of the chip, hence depending on the placement of the devices either of the pins can be used.
    The SYNC_OUT signal is the digital output from the master to enable synchronization of the frame start between the device. This can be used as a hardware trigger signal for the device to start the frame transmission.
    OSC_CLKOUT is only a debug pin used to bring out divided version of the synth clock (2.5Ghz or 5ghz) or Ref clock (40/50 Mhz) for testing and validation.
    Regarding the Fig 6.1 , this is an internal block diagram and hence not all the signals come at the chip boundary, some of them are internal signals used internally. For example SoC clock is an internal clock.

    We will get back to you with detailed connection recommendations for a cascade system.

    Regards,
    Vivek
  • Thanks, Vivek!

    Looking forward for the information regarding cascading.
  • Spring,
    An application note will be posted on the cascade configuration on ti.com over the next few weeks.

    Thanks,
    Raghu