• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 30 subscribers
  • Views 487 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AWR1243: mmWave Sensor SPI Clock Frequency conflict in design documents

RadarIO
Prodigy 80 points
Part Number: AWR1243

Looking at the AWR12xx datasheet it appears the SPI bus can run at a maximum rate 40MHz (40Mbps). However, there is a note on page 27 of the AWR1xxx Interface Control document that says "SPI clock frequency that the SPI master uses should be less than 15MHz." Which one is correct? This is where the BFM could help de-conflict documentation issues.

  • 0
    TI__Guru 58035 points
    Hello Jonathan,
    The SPI block supports upto a 40Mhz clock, as specified in the datasheet. With an actual host communicating to the AWR1243 device , we have so far validated the complete operation upto 15Mhz clk frequency, we are planning to validate it at higher frequencies as well.

    regards,
    Vivek