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Hi Experts,
We have been facing a problem about the SPI communication between AWR1243 and an external FPGA.
After NRESET is set to HIGH, INTR becomes and keeps HIGH.
So, during this condition, SPI communication seems that it might not be working properly.
Could you please look into it and let us know your observation?
The attached file shows each line level when NRESET is set to HIGH.
If you need any other information, please let me know.
Best regards,
Hitoshi
7532.20170814_TI_AWR1243_NRESET.pdf
Hitoshi-san,
Can you please confirm the following?
1) Are you trying to configure the device by sending raw streams from the FPGA?
3) Have you flashed the AWR1243 ES2.0 device with the ES2.0 firmware that is available in the MMWAVE-DFP ?
4) Have you followed the "Section 3.2 Communication Sequence" in the Radar Interface Control document to send the message/receive message from the device?
BR,
Raghu
Hi Raghu,
Thank you very much.
There was an answer to another thread about this thread problem.
e2e.ti.com/.../2267188
My customer has INTR lowed by correcting the thread's answer and H / W flaw.
Best regards,
Maekawa