Hi TI‘s expert,
I am using DDC2256A along with Altera Cyclone IV GX FPGA. I had several question when I read the datasheet of ddc2256a.
First ,The datasheet shows the min VIH is 0.8DVDD and the max VIL is 0.2DVDD. That is if DVDD is
1.8V, the min VIH is 1.44V and the max VIL is 0.36V. But FPGA datasheet shows the min VOH is 1.35V,the max VOL is 0.45V, the level cannot meet these two values.
Q1: Is there any ways to solve this issue?
Q2: The datasheet also shows the differential output voltage(VOD) is 700mVpp. But the maximum differential input for Altera Cyclone IV GX FPGA. is 600mV.
Is there any ways to solve this issue?
Second, I need three DDC2256A to connect a FPGA in my design.
Q1: how connect to The differential clock inputs (CLK)and CONV of the device between FPGA and three DDC2256A? Star pattern? daisy chain pattern ? individual pattern ? which pattern is the best?
