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AFE5401-Q1EVM: AFE5401-Q1 EVM Schematic

Naik
Intellectual 720 points
Part Number: AFE5401-Q1EVM
Other Parts Discussed in Thread: AFE5401-Q1,

Hello,

I have some questions regarding the AFE5401-Q1 EVM design.

1. Is it recommended to use the different ground for Analog and Digital part on this board? By looking the schematic I can see only one Ground plane. 

2. The Digital output page 55. uses DATA buffer U3, what are the purpose of this? As all the input resistors are DNI. 

3. What is the minimum operating frequency for the EVM? 

4. Datasheet for AFE5401 mentions that it can work at a minimum clock of 12.5 MHz but Antialias filter BW can be set to 7MHz minimum. Sorry If I miss something but for this clock should be 14MHz minimum.

Really appreciate your help! Thank you!

  • 0
    TI__Genius 12025 points

    Hi Vatsal,

    Thanks for using our AFE5401-Q1 device.

    We will look into your question and reply to you very soon.

    Thank you!

    Have a nice day!

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    TI__Genius 12025 points

    Hi Vatsal,

    How are you?
    Thank you for using AFE5401-Q1 device.


    For your questions about using our AFE5401-Q1EVM:
    1. To use the different GNDs for analog and digital planes
       or to use only one GND plane but separated by thick empty traces has the same purpose
       is to isolate the ground noise between the quite GND
       (such as INxP and INxM) and noisy GND (such as D0-D11, DCLK and DSYNCx).
       When we are using different GND planes, we also need to connect these GNDs (below)together
       not only different GNDs for AFE5401-Q1 device itself but also for all the power GNDs connections.
       Because we may use one power (+5V) shared to all other powers on the EVM,
       their GNDs are different as well.
       Please also concern these issues.
    2. As you can see from the schematic for DATA buffer U3x,
       the default is marked as DNI (Do Not Installed).
       We are running the device's output pins (CMOS) directly to connect to TSW1400EVM
       without using the DATA buffer. It is fine.

    Thanks for using  AFE5401-Q1.

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    TI__Genius 12025 points

    Hi Vatsal,

    How are you?

    For the question #3, we think you are mentioning the minimum input signal frequency on this EVM, right?

    Here is the picture shown on the first page of the EVM schematics.

    CH1 and CH2 suggest minimum 1MHz signal.

    CH3 suggest minimum 5KHz signal.

    CH4 input using single-ended.

    Yes, if the AFE5401-Q1 device datasheet spec its minimum clock freq is 12.5MHz

    then its Nyquist freq would be 12.5MHz/2, also the minimum Antialias filter (7MHz) still higher than that.

    So the only satisfied method is to run faster clock speed such as 14MHz.

    Is it OK for you to run higher clock freq than 12.5MHz?

    I will double check this question with our other engineer and let you know later.

    Thank you so much.

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    Intellectual 720 points
    Hello Chen,

    Thank you for your quick reply to my question.

    1. Yes now i understand why only one GND plane is used. Would that be possible to send me a gerber files, or Layout guidlines, So I can understand it more? The datasheet gives just general guidline.

    2. Answered.

    3. Answered. I have one more question, In datasheet it is mention that if Single Ended input is used Device can not be as linear as it will be with
    differential input. Is there any graph that expains that howmuch linearity can be loss in single ended?

    4. Yes, I can use 14 MHz insted of 12.5MHz doesn't make much difference for me.

    Really appreciate your help.

    Regards,
    Vatsal.
  • 0 in reply to Naik
    TI__Genius 12025 points

    Hi Vatsal,

    How are you?

    Thanks for using our AFE5401-Q1 device.

    For your question 1,

    yes, please provide us other way such as email address

    for the gerber files.

    If using single-ended signal input to AFE5401-Q1

    (assume we are going to use INx input pins including LNA, PGA,

    antialiasing filter and ADC.), there are several things we are going to miss.

    For example, using differential input signal, our maximum input amplitude

    (from INxP to INxM) is 0.5Vpp. However if using the single-ended input signal,

    our maximum input amplitude (due to INxM limited to be DC) would become 0.25Vpp (only half swinging range).

    Also our other engineer said using single-ended input signal for AFE5801-Q1 device,

    it may make harmonics reduce about 5 to 6dB which would make the linearity more worse.

    Also our engineer replied to me,

    yes, if you are using the 7MHz antialias filter, then please make the clock input be >= 14MHz.

    Thank you very much!

    Have a nice day!

    Best regards,

    Chen

      

  • 0 in reply to Chen Kung
    Intellectual 720 points
    Hello Chen,

    Please send files to this E-mail id. vatsal.naik@jetasonic.com

    Sure I will use 14MHz.

    I have one more question, Ch-1 and Ch-2 has CT transformer which is widely used for differential input and Ch-3 doesn't use Center Tap configuration but it can accept low frequency range. My question is if we use 500KHz input signal which is accepted by both of the configuration, does it make any difference in the output?

    Thank you.

    Regards,
    Vatsal