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IWR1642: About ADC buffer interrupt

Part Number: IWR1642
Other Parts Discussed in Thread: MMWAVE-SDK

Dears,

Our customer is using IWR1642, now he have some problems.

Based on white  paper SWRU522A,when the DSP has streamed the programmed number of chirps into a  buffer, a chirp available interrupt is raised, and this interrupt event is  assigned to MSS(master subsystem: cortex R4F).How does DSS( DSP subsystem: DSP  C674x) get this interrupt event? is there a direct path which the event can  reach DSP's INTC? if the direct path does not exist, did R4F has transmitted the  event to DSP, and what is the index of the event in "DSP Interrupt  Map"?

Thanks for any information anyone can provide.

Regards,

Ricardo

  • Hello Ricardo,

    The 1D FFT chirp processing is triggered by hardware chirp event generated when the ADC has samples to process in the ADC buffer Ping or Pong memories. The hardware event triggers the registered chirp event interrupt handler function MmwDemo_dssChirpIntHandler, that in turn posts MMWDEMO_CHIRP_EVT to MmwDemo_dssDataPathTask. The task initiates EDMA transfer of rx antenna samples in a ping pong manner to parallelize C674x processing with EDMA data transfer from ADC buffer to L2 memory.

    The details of the data processing are provided in the documentation of the mmWave demo application available in the MMWAVE-SDK .

    $mmwave_sdk_01_00_00_05/packages/ti/demo/xwr16xx/mmw/docs/doxygen/html/index.html  

    Please refer to this documentation for details on the data processing path.

    Thanks,

    Raghu

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  • Hello Raghu,

    Thank you very much for providing the answer. I will tell the customer.

    Regards,

    Ricardo