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AFE5818: Reading LVDS data into Microcontroller for signal processing ?

BL
Intellectual 615 points
Part Number: AFE5818

Hi

We're using an AFE5818 which has 16 LVDS-output channels, each channel has an 14-bit ADC and a sampling rate of 50MHz (=> 700 Mbps each channel). We want to transmit the data from the AFE5818 into for example: a microcontroller in order to do the signal processing. Problem is that we could not find any microcontroller which supports these LVDS outputs from AFE5818:

    - Is there any recommendation on a suitable MCU for these LVDS outputs ?

    - If a MCU is not a solution for this, what are other options for reading these LVDS outputs and perform signal processing ?

Thanks.

  • 0
    TI__Expert 4145 points

    Hi Bien Le,

    Unfortunately, i do not know of any MCU that can be used to successfully capture and deserialize LVDS data stream from the AFE5818--as you stated, it is a pretty high bit rate.

    Most of our customers use FPGAs to deserialize the incoming LVDS stream. This application note outlines some best practices when deserializing serial LVDS data.

    The TSW1400EVM's FPGA firmware(TSW1400EVM usually matched to the AFE5818EVM for evaluation) is also available here.

    Sincerely,

    Olu

  • 0 in reply to Olu Sodipe
    Intellectual 615 points

    Thanks for the response Olu

    We also kind of aware of this high speed data communication problem on MCU, but it would take us much more effort to do the whole signal processing on a FPGA.

    Is it possible to use a FPGA with integrated MCU (Soc) to:

          - deserialize incoming LVDS using FPGA and then perform signal processing using the integrated MCU ?

    Thanks

  • 0 in reply to BL
    TI__Expert 4145 points

    Hi Bien Le,

    When you say FPGA with integrated MCU, do you mean something along the lines of a Xilinx Zynq FPGA?

    The amount and type of processing you plan to do on the FPGA's hardcore processor will probably be the deciding factor. I am not very familiar with the limitations of the hardcore processors for the SoCs so I recommend you contact the FPGA vendors to understand the processors' limitations.

    On the LVDS deserialization part, there are different ways to go about deserializing serial LVDS data. In addition to the firmware source code and the application note I sent you yesterday, here is another appnote from Xilinx you can use as a reference.

    The easiest way to deserialize the LVDS stream is to use the FPGA vendor's LVDS/SERDES IP which generally reduces the problem to providing the right hand-shaking signals between IP design blocks. The two main FPGA vendors should be able to provide you with a list of FPGAs that work with their respective LVDS/SERDES IPs.

    Sincerely,

    Olu

  • 0 in reply to Olu Sodipe
    Intellectual 380 points

    Hi,

     I am using TI's FMC- ADC Adapter board to make interface between AFE5818 and Kintex 7 KC705 FPGA board. My question is, Do i need to use the serdes primitives to deserialize the LVDS data in FPGA side? 

    Thanks,

  • 0 in reply to Subash M10
    TI__Expert 4145 points

    Hi Subash,

    This is a closed thread so please open a new thread if you have any further inquiries.

    With that said, you don't necessarily have to use Xilinx's SERDES IP to deserialize LVDS data on the FPGA side--it is just likely easier than the alternative. 

    Please open a new thread if you have any additional questions.

    Sincerely,

    Olu

  • 0 in reply to Olu Sodipe
    Intellectual 380 points
    I open the new thread. but nobody has replied yet all.