AFE5801: AFE5801 questions

Mickey Zhang

Genius 12080 points

Part Number: AFE5801

Hi team,

The customer has two questions for AFE5801.

Q1: Can the customer use AFE5801 as an ADC, the output signal of AFE5801 is connected to FPGA?

Q2: Can the clock(CLKP/N pins) of AFE5801 be provided by PLL of FPGA? Or need an external crystal?

Best Wishes,
Mickey Zhang
Asia Customer Support Center
Texas Instruments

over 7 years ago

0 Mickey Zhang over 7 years ago

TI__Genius 12080 points

Hi team,

Can you provide some suggestions for the customer's questions? The customer is waiting for my reply.

0 Mickey Zhang over 7 years ago in reply to Mickey Zhang

TI__Genius 12080 points

Hi team,

Update:

Q3: Can DCLK and FCLK signals be synchronization output with the data?

0 Olu Sodipe over 7 years ago in reply to Mickey Zhang

TI__Expert 4145 points

Hi Mickey,

According to Page 9 of the datasheet, the FCLK and DCLK are synchronized to the output serial data. We actually recommend deserializing the output data using both FCLK and DCLK.

The AFE5801's serial LVDS output pins can be connected to differential pins on an FPGA. Lastly, an FPGA output clock can be noisy so we recommend either running the FPGA clock through a jitter cleaner like the LMK0482x before the AFE5801 or using an external crystal instead.

Sincerely,

Olu

0 Mickey Zhang over 7 years ago in reply to Olu Sodipe

TI__Genius 12080 points

Hi Olu,

Thanks for your reply.

The datasheet shows "The common-modevoltage of the clock source should match one of the clock inputs of the AFE5801 (VCM) which is set internally using 5kΩ resistors,as shown in Figure 39."
Does this VCM mean the 1.6V VCM that is on page 5 of the datasheet and pin 17 and pin 64?

That is pin 17, pin 64, the the 1.6V VCM that is on page 5 of the datasheet and this above VCM are the same ?

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AFE5801: AFE5801 questions