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AWR1243: There is a problem with the waveform of LVDS.

H.Tanaka

Prodigy 40 points

Part Number: AWR1243

Hi everyone,

We are using AWR 1243 (ES 2.0).
Connect to the FPGA using LDVS.

There is a problem with the waveform of LVDS.

A glitch occurs in "FRCLK signal" and "valid signal" 3 ns after the edge.

I changed the frequency and tried it for 900 Mbps DDR, 450 Mbps DDR, 450 Mbps SDR. However, glitch occurs 3 ns later.

Is there anything to check with register settings?

I confirmed PCB， but there is no problem.

over 7 years ago

0 Abdulraheem Killedar over 7 years ago

TI__Expert 3610 points

Hi,

Could you hep us with a Oscilloscope capture? LVDS interface wise, we have never observed this, Please check if there is a coupling on the board?

regards

AK

0 H.Tanaka over 7 years ago in reply to Abdulraheem Killedar

Prodigy 40 points

HI,AK

The termination of the FPGA is 100 Ω.

As a test 100 Ω termination was added externally, but the same result was obtained.

This is the waveform of FRCLK 450 MHz DDR.

0 Abdulraheem Killedar over 7 years ago in reply to H.Tanaka

TI__Expert 3610 points

Hello Tanaka san,
This looks to be impedence mismatch between source and detstination.

regards
AK

0 H.Tanaka over 7 years ago in reply to Abdulraheem Killedar

Prodigy 40 points

Hello AK san,

Thank you for your support.
I will check the impedance.

0 H.Tanaka over 7 years ago in reply to H.Tanaka

Prodigy 40 points

Hello,AK san

Thank you for your support.

The problem with this waveform seems to be a problem with the probe point.

This problem was solved.