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AWR1642BOOST: How can I use EDMA-mode in UART?

JuiYang Chi
Intellectual 860 points
Part Number: AWR1642BOOST
Other Parts Discussed in Thread: MMWAVE-SDK

I know I have to define gEDMAHandle to UART_Params.edmaHandle

But I don't have idea about UART_Params.paramSetId

Is it mean the number of EDMA-channel
or like EDMAutil_configType1.chId which I have to choose?

I want to use DMA Blocking Mode in mmw_Demo for DSS.

To use DSS_uart_tx for transmit data.

How can I coding for UART_Params.paramSetId ?

For 64 or any number(From EDMA_TPCC0_REQ_FREE_10 to EDMA_TPCC0_REQ_FREE_23 )

  • 0
    TI__Guru 69960 points
    Hello JaiYang,
    mmWave-SDK provides UART driver test application (<mmwave-SDK>\packages\ti\drivers\uart\test\) which you can use for reference to use eDMA with UART.

    uart_test.c:Test_profileTransmit() - this function does the eDMA configuration to write data over UART in DMA mode.


    Regards,
    Jitendra
  • 0 in reply to Jitendra Gupta
    Intellectual 860 points

    I see the application.
    I have three question.

    First, I don't have idea. Why is params.paramSetId given EDMA_NUM_DMA_CHANNELS(64U) ? 

             I also see the swru520a.pdf. It say PaRAM can set [0:511].

             I want to know the params.paramSetId which we can give ?

             It has to give 64U. Or we can change it?

             If we can change it, it is given different value( 0~511 ). And are they different?

    Second, the pdf say EDMA has 64 channel in DSS.

                  In sys_common_xwr16xx_dss.h, EDMA event interrupt also have 64.

                  Does it match the channel ?

    Third, which channel will be use when UART in EDMA mode?

  • 0 in reply to JuiYang Chi
    TI__Guru 69960 points

    Hello JuiYang,

    First,

    If you go through swru520a.pdf [pg:166-167] it explains TPCC and TPTC features.

    So as per that MAX PaRAM entries are 128+256.

    In UART test application params.paramSetId has given EDMA_NUM_DMA_CHANNELS(64U) so just to avoid wastage of memory, alternatively, you can go beyond this paramSetId till that TPCC[0-1] supports. For TPCC0 you can range from 0-127 and for TPCC1 0-255.

    Pg 832:

    * 384 PaRAM sets, EDMA_TPCC0:128, EDMA_TPCC1:256:
    – Each PaRAM set can be used for a DMA channel, QDMA channel, or link set.

    Could you please specify the page of the document where it says 512 ParamSet, we can check for any discrepancy.

    Second,

            If you referring to SOC_XWR16XX_DSS_INTC_EVENT_TPTC2_IRQ_DONE [64] defined in sys_common_xwr16xx_dss.h then it's not related to eDMA channel no. 64.  Above MACRO says interrupt event when eDMA data transfer is done.

    Third,

    Table 2-14 explains the list of hardware interrupts connected to the different channel of eDMA (TPCC0/1).

    #define EDMA_TPCC1_REQ_UART_RX (42U)
    #define EDMA_TPCC1_REQ_UART_TX (43U)

    Regards,

    Jitendra