The datasheet of AWR1243 shortly describes the radar chip connection to the TDA3x (or TD2x) SoC as external MCU.
Is one TDA3x able to handle two AWR1243 in cascade, i.e. handle 4 Lane Data + 1 Clock lane from two AWR1243?
Does TI provide a reference implementation for a software design on the TDA3x SoC, i.e. some framework for starting a software design using the AWR1243 together with the TDA3x?
Thanks
/Henric