Hello
If a cascaded system with AWR1243 is considered, please help me with answer of some questions in both mode: single chip mode and cascaded chips mode.
The chips programming are done with SPI pins.
1- In datasheet, there are three pins called: SYNC_OUT, PMIC_CLKOUT and TDO that are connected to host processor with 47.5K resistors.In boost, these pins are used for SOP.
Can i ignore these connection?
2- can i ignore concection of PMIC_CLKOUT to host processor? if this connection shoud be to made, how to cannect this pin in Slave?
3- In page 4 of datasheet, it is said that AWR1243 chip does not have ability of JTAG but these pins are used in AWR1243boost !?
can i ignore these pins in connections? what will be the TDO pin? how shoud they be in SLAVE?
4- If SYNC_OUT of master to be connected to SYNC_IN of Slaves as well as Master, can i ignore connection SYNC_OUT of master to host processor for SOP? can i ignore 47.5K resistor?
5 In page 4 of datasheet, it is said that AWR1243 chip does not have ability of QSPI but these pins are used in:(datasheet,boost and even in the cascade document)!
can i ignore these connection when used SPI for programing, and in that case, can i not connect RS232TX and RS232RX pins (UART)?
6- We want to change the voltage level of IO's pins from 3.3 v to 1.8 v that will do this by changing the one of the output of the PMIC from 3.3 v to 1.8 v.
Is it just enough to data and clock pins of PMIC(AR_SDA , AR_SCL) are connect to Host processor and do not connect to RES pins of AWR1243?
can i ignore connections on RES pin in AWR1243?
thanks for your attention