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AWR1243: Synchronization uncertainty in DIG_SYNC_IN

dtaylor
Prodigy 130 points
Part Number: AWR1243

Dear all,

I am currently looking into the algorithmic part of a MIMO setup consisting of a number of AWR1243 chips synchronized via its cascading features.

If I understand correctly, DIG_SYNC_* is used to synchronize the data capture. Section 2.2.3 of SWRA574A lists a number of sources for imbalances affecting this signal; while most of them can probably be calibrated, I am not sure about the (non-deterministic) synchronization uncertainty of 0/0.55 ns (one sync clock cycle).

As the relative Rx delays that encode the angle information are in the order of several ps, I am wondering how this uncertainty affects standard MIMO / phase processing?

Is there a way to maintain a consistent phase relationship between the capture units of different devices for the duration of multiple frames / frame trigger events? If not, how is this uncertainty accounted for e.g. in your cascaded demonstration designs?

Thank you and best regards,
David

  • 0
    TI__Guru*** 147964 points
    Hi,

    How many AWR1243 do you plan to cascade in your design?

    Thank you
    Cesar
  • 0 in reply to Cesar
    Prodigy 130 points
    Hello Cesar,

    this depends a little on the answer to my question and what other limiting factors we come across, but probably more than 4 devices. However, even for the simple case of 2 devices I fail to see conceptually how the non-deterministic phase differences in the Rx channels can be compensated in a simple way (i.e. without estimating the phase error(s) for every frame). Or is it somehow possible to meet setup/hold timing for the assumed 1/0.55ns = 1.8 GHz sync clock in the frame trigger path and thus remove the uncertainty?

    Best regards,
    David
  • 0 in reply to dtaylor
    TI__Guru 58035 points
    Hello David,
    Between chip to chip there could be uncertainty of 550psec (0.550 nsec). This mismatch is at the ADC sampling point , and hence the phase mismatch would depend on the IF frequency.
    Even at the max IF bandwidth of 15Mhz this would come to less than 2.9deg phase mismatch. For closer objects this would be even lesser phase mismatch.

    Regards,
    Vivek
  • 0 in reply to Vivek Dham
    Prodigy 130 points
    Hello Vivek,

    thank you for your helpful answer! Let me elaborate to make sure I understand correctly:
    - No part of the HF path is affected by the sync uncertainty, so the deterministic phase alignment of the MIMO channels only depends on the quality of the LO (20 GHz ramp) distribution.
    - The 550 ps delay only shifts the ADC sampling interval after downconversion, so it translates to a phase uncertainty which is proportional to the IF (and not the carrier frequency) as you pointed out.

    Is that correct?

    Thank you and best regards,
    David
  • 0 in reply to dtaylor
    TI__Guru 58035 points
    Hello David,
    That is right. The RF carrier phase alignment is dependent on the 20Ghz LO distribution on the board.

    Regards,
    Vivek