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AWR1243: question about AWR1243 hardware design and debug

min hu
Intellectual 990 points
Part Number: AWR1243
Other Parts Discussed in Thread: , UNIFLASH

Hi,

I am designing a test board base on AWR1243 and FPGA,i found not enough detail in datasheet, 

Q1.AWR1243 datasheet of version SWRS188 –MAY 2017 have no details about Power up suquence,any Power design recommendation?

Q2.AWR1243 control port is SPI,which is connected to FPGA in my design,what is the SPI start up sequence?How to control tranceivers,any document and register map description? is it possible to run AWR1243 without any software assistant(No Soc in my current design)? 

Q3.the data interface is CSI2 or it can be configured to normal LVDS?

  • 0
    TI__Guru*** 149044 points
    Hi,

    The AWR1243 must be used together with host processor.

    The host processor will control the AWR1243 through the mmWave Link API.

    Please for design reference please check the AWR1243BOOST

    www.ti.com/.../AWR1243BOOST

    I will refer your question to our CSI2, LVDS experts for further discussion

    thank you
    Cesar
  • 0 in reply to Cesar
    Intellectual 990 points

    Q1:

    The RS232 port of AWR1243 must be used？？

    Q2:

    the firmware is download by RS232 port,how can it be disabled by firmware pin mux setting?

  • 0 in reply to min hu
    TI__Mastermind 18500 points

    Hi Min, 

    I will takeover responses for this topic from Cesar. 

    In reference to your latest questions: 

    1. The reference you posted 5.1.4 SPI Connection & RF Setup is in reference to our RadarStudio GUI tool which is a radar performance GUI meant to run with our evaluation boards. Radar Studio assumes that the radar device on the target evaluation board has been set into "debug" boot mode. 

    2. From the AWR1243 datasheet, the device currently supports three different boot modes: 

    For development purposes, the UART image loading is useful for quickly loading a newly build image set directly onto the RadarSS MasterSS memory. But right now we only support this with our evaluation kits and Radar Studio. 

    For customer custom board usage the Flashing Mode and the Functional Mode work together

    • Flashing mode enables the use of the TI Uniflash software to flash a new RadarSS image and MasterSS into QSPI boot memory
    • Functional mode loads the images out of the attached QSPI boot memory

    I am not sure why, but the AWRx familly techdocs page does not include a link to the Technical Reference Manual (TRM): http://www.ti.com/lit/ug/swru522a/swru522a.pdf

    The TRM is a more verbose datasheet supplement which describes all supported subsystems in detail. 

    The mmWave SDK http://www.ti.com/tool/mmwave-sdk documentation includes more description into the support control interfaces and formatting. 

    I will find out where the pinmux control is documented to allow for you to disable the RS232 pins.  

    Pinmux control is determined by the AWR1243 firmware included in the DFP. Please reference the DFP AWR1xx_Radar_Interface_Control document for a description of all available interfaces on the AWR1243. This is included in the Device Firmware Package (DFP) here: http://www.ti.com/tool/mmwave-dfp 

    3. Your first set of questions: 

    Q1.AWR1243 datasheet of version SWRS188 –MAY 2017 have no details about Power up suquence,any Power design recommendation?

    Currently the only supported power distribution network design (layout and netlist) is the one designed into the various AWR/IWR evaluation kits. TI is currently evaluation other options with respect to noise performance and cost optimization. http://www.ti.com/tool/iwr1443boost 

    Q2.AWR1243 control port is SPI,which is connected to FPGA in my design,what is the SPI start up sequence?How to control tranceivers,any document and register map description? is it possible to run AWR1243 without any software assistant(No Soc in my current design)? 

    The mmWave Link API documented in the mmWave Link SDK documentation describes the current interfaces allowed. Right now, image loading is performed over UART or QSPI flash and control is only available over SPI and UART. 

    Q3.the data interface is CSI2 or it can be configured to normal LVDS?

    Both CSI2.0 and LVDS is supported on the AWR1243. Checkout these sections in the linked TRM document above.  Please reference the DFP AWR1xx_Radar_Interface_Control document for a description of all available interfaces on the AWR1243. 

    Please let me know if you have any more questions on these topics. 

    Thank you,

    Randy

  • 0 in reply to Randy Rosales
    Prodigy 20 points
    Correct me if I'm wrong, but the swru522a.pdf document that you reference does not include the AWR1243.
  • 0 in reply to Rainer Malzbender
    TI__Mastermind 18500 points
    Hi,

    Yes. Please see my corrected response in above post.

    There is no AWR1243 specific TRM since all of the available options are determined by the AWR1243 firmware. This is included in the Device Firmware Package (DFP) here: www.ti.com/.../mmwave-dfp Please reference the DFP AWR1xx_Radar_Interface_Control document for a description of all available interfaces on the AWR1243 and their uses.

    Thank you,
    Randy