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AWR1243: AWR1243

Part Number: AWR1243

Hello

I want to have cascaded system with AWR1243 that just works only in the functional mode. For this purpose, SYNC_OUT and PMIC_CLKOUT pins from both master and slave are pulled down and TDO pin is pulled down. On the other hand, we need 4 voltage 1.8 V ,1.2 V, 1.3 V and 1.8 V (for IO's) to run the AWR1243. Chip programming is done with SPI pins.

For these voltages, in Boost a PMIC and 2 LDO regulators are used.

1-Can i not use a PMIC and instead use 4 LDO regulators to generate these Voltages?

There are 3 GPIOs that in boost are connected to circuits and are not connected to Host processor.

2-  What are these GPIOs and circuits connected to they? Need to connect these GPIOs to Host processor? Can i ignore these GPIOs in design? If so, what should they be in Slave?

thanks for your attention.