AFE5818: Ground separations

Roger Dixon

Part Number: AFE5818
Other Parts Discussed in Thread: AFE5804, VCA5807, ADS52J90

I'm trying to understand fully the implication of the suggested ground break shown in Figure 110 (p. 87) in the AFE5818 datasheet. Before I describe the concern I have, I'm assuming a few things that may not be true, specifically:

(1) Internally 2 die exist, a VCA containing the items shown in the block diagram of Figure 98 (p. 68), and an ADC side with the rest of the circuit as shown in Figure 99 (p. 69). There was an EDN article some time ago that explained this as the partition in the AFE5804 (www.edn.com/.../Diagnostic-ultrasound-gets-smaller-faster-and-more-useful), and so I'm guessing that it's likely that the same partition exists in the entire series.

(2) No isolation was performed between the AAF output and the ADC input.

From the perspective of the VCA side of the part, this break would be ideal in that the hash circulating in the digital ground plane would be isolated from the FE, which really is mandatory for CW. However with this break any inter-ground voltage between the analog and digital planes will appear as a common-mode voltage at the ADC input. Worst case this voltage can reach a few hundred mV and have significant spectral content well into the UHF region. A plot of the CMRR of the ADC isn't shown, but I'd think it's probably much like any op-amp which degrades monotonically as the frequency is increased. Since the AAF is on the VCA side it can't help remove the above-Nyquist components prior to the ADC, and so the problem is compounded due to aliasing effects.

Am I missing something? Any clarification would be greatly appreciated.

Thanks,

Roger Dixon

over 6 years ago

0 Xiaochen (Sean)Xu over 6 years ago

TI__Expert 6040 points

Roger, good to get connected with you! via TI forum i certainly understand of your concerns. Separating GND is a tricky task. in some cases, a separated GND may trig unexpected noise; while solid GND may be easy to handle.

our VCA and ADC are complete indivual dies. each die has its own power supplies and GND. the main link is through the VCA output and ADC INPUT, plus the SPI signal.

in normal signal capture operation, SPI enters the idle state after programming.

In the TGC mode, the VCA signal pass to ADC side , via differential pairs. We didn't observe extra noise due to separate GNDs.

In CW mode, the ADC should be in the partial power down mode and the live signals are ADC clock and LVDS signals which are much higher than CW operation frequency. we hope these noise won't affect the CW performance. plus CW block is away from the VCA output. it is more close to the LNA input side.

based on our observation, the noise from power supplies and GND can be picked up by input pins of VCA mainly, then amplified. So we carefully design the EVM to avoid GND, power layers under INP, INM, ACT pins. that means the vias won't go through power/GND plane and pick up noise.

when we put more and more channels; pure isolation via transformers is difficult. we have to rely on the differential coupling between ADC and VCA.

So far, the AFE5818 solution has been verified in the field. we didn't see much concern on CW and PW performance even in very high channel count systems.

Thanks ! Keep in touch!

Xiaochen

0 Roger Dixon over 6 years ago in reply to Xiaochen (Sean)Xu

Prodigy 185 points

Thanks Xiaochen, very happy to see you're still with TI. You answered my essential question about the architecture, but I still have to wonder about the CMRR of the ADC. The way you have the EVM set it wouldn't be difficult to measure though. So if this ground split existed as shown then the problem shifts to maintaining the inter-ground noise level to a tolerable level, which in turn would be based on that CMRR measurement. My guess would be that this means the system single-point ground would need to be close to the group of AFE chips instead of the more common location closer to the supplies. Originally we were splitting 256 channels worth of these onto 2 boards, but it seems a shift to a single 256 channel RX board might be warranted because of this. Also extra attention would need to be paid to the filtering in the path of the digital power to attenuate the switching activity on those lines back to the single-point ground.

I understand the difficulty of isolating the ADC inputs, but long term that seems unavoidable to be able to compare to high-end systems that use separate TGC and ADC chips which allow for isolation between them. In your case bringing the AAF outputs and ADC inputs to pins would accomplish that, but the pin count would be much higher.

By the way, I had noticed the voiding of the analog ground plane around the RF inputs and thought it may have been a copy/paste type of error. That's appropriate for the power, but the ultrasound signals that connect to these inputs are referenced to that ground plane and so you wouldn't want to place a void in it.

Thanks again!
Roger

0 Xiaochen (Sean)Xu over 6 years ago in reply to Roger Dixon

TI__Expert 6040 points

Roger,

the ADC CMRR is about -40dB at 50mVpp 5MHz tone applied. you may refer to the ADS52J90 datasheet . that is the ADC used in the AFE5818 family. If the seperate VCA and ADC arch are preferred for high end system, you may consider the VCA5807

www.ti.com/.../Ads52j90
www.ti.com/.../VCA5807

the island on the GND plane for inputs INP pins is mainly for avoiding the via noise pick up. the trace still has GND plane before and after the island. the INP pins are usually on top layer and has no vias. so the island shouldnt affect the input signal much.

Thanks!

Xiaochen

0 Roger Dixon over 6 years ago in reply to Xiaochen (Sean)Xu

Prodigy 185 points

Thanks Xiaochen, I see that this ADC does indeed have a CMRR plot in Figure 32, and it's much better at high frequencies than I'd thought was likely, e.g. the -40 dB rejection is held up through 60 MHz. You might want to consider including it in the AFE5818 datasheet since this is a critical issue. My bias though would favor your 2 chip option since it seems easier to isolate the 2 rather than try to control the inter-ground hash. It's mainly a question of circuit density; as pretty much is always the case there's an unfortunate trade-off between performance and density.

Roger

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AFE5818: Ground separations