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AWR1642: EVB issue, power sequence question and clarify

Part Number: AWR1642

Hi Sir,

We measured power sequence of TI AWR1642 EVM.

We encountered the AR_1V8 sequence doesn’t meet specification in datasheet.

When NRESET rise high, it should be behind at AR_1V8 about 3ms but it seem not the result we measured in the EVB

Please help to clarify it if we are wrong 

  • Hello KJ,
    On the EVM we recommend providing the nRST (using the onboard push button ) after the power supplies have been provided.
    Since the 1.8V volt supply is generated by and LDO that follows the PMIC , it comes up after the nRST which depends on the 3.3V supply.
    On the actual system the nRST has to be controlled externally either by voltage monitoring circuits that will ensure nRST is released after the supplies are up or control it by an external MCU.

    Regards,
    Vivek
  • Hi Vivek,

    Thanks for your reply, it looks the power monitor circuits is needed for this system. Does TI have plan to develop PMIC of AWR1642 and integrate all power included power monitor circuit that AWR1642 needed to save external circuit ?
  • Hello KJ,
    If you look at the TIDA 01570 design (www.ti.com/.../TIDA-01570) the LP8770 PMIC monitors all the voltages and the GPIO and PG signals of the 8770 are used to control the nRST to the AWR device. This is one option.

    Regards,
    vivek