AWR1243: 2 SPI clocks delay

radarJunkie

Expert 2090 points

Part Number: AWR1243

Hi,

In the AWR1xx_Radar_Interface_Control.pdf, section 3.2.4 SPI Message Sequence – Command/Response, the note mentioned host should ensure that there is a delay of at least 2 SPI clocks between CS going low and start of SPI clock.

Is that really necessary? My current configuration of the SPICLK is @ 8MHz, and the device seems to be responding.

Regards,

over 7 years ago

0 Cesar over 7 years ago

TI__Guru**** 150704 points

Hi,

2 SPI clocks is the delay recommended based on our testing

The device may be responding with less delay at 8MHz but it may not be sufficient at higher rates.

thank you
Cesar

0 Dominic Wu over 7 years ago in reply to Cesar

Intellectual 515 points

Hi,

In your testing setup what was the rate of the SPI clock? By higher rates, what is the highest SPI clock rate that the AWR1243 support?

Thanks

DW

0 Cesar over 7 years ago in reply to Dominic Wu

TI__Guru**** 150704 points

Highest SPI clock rate is provided in the datasheet. It is 40MHz

thank you
Cesar

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AWR1243: 2 SPI clocks delay