TSW1400EVM: Frame Clock Error in read DDR to file

BCS Rohith

Part Number: TSW1400EVM

I have encountered the following error when interfacing AFE5809EVM with TSW1400 EVM. I have checked the LED's on the TSW and the LED4 doesnt seem to glow and LED3 is glowing but it has very low brightness.Any suggestions about how to go about it?

over 7 years ago

0 Jim Brinkhurst1 over 7 years ago

TI__Mastermind 44680 points

Hi
We have received your question and will respond in more detail later.
Best regards,
Jim B

0 BCS Rohith over 7 years ago in reply to Jim Brinkhurst1

Prodigy 155 points

Jim Brinkhurst1 Sir any updates on this ?

0 Praveen Aroul over 7 years ago in reply to BCS Rohith

TI__Mastermind 49956 points

Hi Rohith,

The following could be the reasons for the error.

– Incorrect firmware loaded
– Current starvation on at least one EVM, 2 A is sufficient
– Missing Data output clock from the AFE to the FPGA. With LVDS, this could be the FCLK or DCLK.
• Verify that the EVMs are mechanically mated correctly
• Verify power supply to both EVMs
• Check the AFE5809EVM for the DCLK (pins 56,58) and FCLK (pins 64,66) on the P10 connector.

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TSW1400EVM: Frame Clock Error in read DDR to file