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AWR1243: Output Power in Cascaded Mode

radarJunkie
Expert 2090 points
Part Number: AWR1243

Hello, 

We have a custom board with a AWR1243 chip which will be a master to to the rest of the slave AWRs in our system. This AWR1243 will not utilize any of its receivers and will solely be used a transmitter. 

We are using the firmware files in the most recent version of the dfp package. 

When I configure the master device to be a single chip radar (not as a master) and measure the output power across 76-81 with 1 GHz step size, the power is fairly consistent. When configured as single chip radar, the LO Out is not very high power ~ - 50 dBm to - 55 dBm. This is done in CW mode.

Then when this master is configured as a master, the output power at 76-81 GHz with 1 GHz steps swings quite a lot. The output is within expectations from 76-77.5 GHz but the output power at > 78 GHz drops by almost 20 dB. This is also done in CW mode. 

I also used Radar Studio instead of our firmware, and observed the same issue; when configured as cascaded device the output power varied quite a lot. 

While debugging this issue, in cascaded mode, I looped back the LO Out of the master into the LO In of itself and the output power became consistent again. Please note that the receivers are disable in this master AWR1243. 

My question is this expected behavior ? If the master is itself generating the LO then why does it needs its own LO to be looped back ?

Is it possible that there is a mux internally that needs to be configured correctly and is not being set correctly, hence potentially a firmware bug ?

I look forward to your help on this. This is an urgent matter for our design.  

Regards,

RJ

  • 0
    Expert 2090 points
    Please note that the LO output was fairly consistent at 0 dBm when the AWR1243 was set in cascaded mode with both our firmware and Radar Studio.
  • 0 in reply to radarJunkie
    TI__Guru*** 149044 points
    Hi,

    we will need some time to review your question. Will get back to you as soon as possible

    thank you
    Cesar
  • 0 in reply to Cesar
    TI__Guru 58035 points

    Hello RJ,

    I assume by latest firmware you are using DFP 1.0.

    In the ES2.0 devices we do have an issue with the 20Ghz SYNCIN on the master device and this get worse at higher frequencies. This does not impact the single chip mode of operation. This is fixed in the ES3.0 devices. But we have seen about 10dB reduction in TX o/p, 20db seems on a higher side.

    We recommend using ES2.0 for cascade use in a limited band of 76-77Ghz.

    Regards,

    Vivek

  • 0 in reply to Vivek Dham
    TI__Mastermind 18500 points
    Hi RJ,

    Addressing your question on "If the master is itself generating the LO then why does it needs its own LO to be looped back ?".

    There is a PCB channel LO delay in incurred by routing FMCW_CLKOUT and FMCW_SYNCOUT LO output to and the power divider and eventual Slave end-points. To minimize the skew between these LO paths the Master device also needs to see a matched, delayed LO at its PA inputs.

    This minimized delay error is required to reducing beam-forming phase errors when running in MIMO modes where TX across the array, and different devices, may be simultaneously in use.

    Please let me know if that answers all of your questions on this topic.

    Thank you,
    Randy