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AWR1243: More that 4 profiles in profile RAM

Part Number: AWR1243

Hello, 

I know that currently the AWR devices support up to 4 unique profiles. The profile indices supported in the ICD go from 0 to 3.

For customers who may need to support to more than 4 types of waveform profiles, is it possible to expand the number of profiles to 6 or more ? I understand that at power-up all the four profiles can be loaded up, but during operation of the radar if a new profile is needed then new profile, chirp and frame configs will need to be sent to AWR via SPI which increases timing overhead.

Thanks

RJ   

  • Hello RJ,
    AWR1243 supports only 4 profiles, and if you want to change profile ID for configured chirps then you can use 'rlSetDynChirpCfg' API to reconfiguration Chirp Config RAM while frame is ongoing. On other side if new profile required then you can overrite existing unused profile using 'rlSetProfileConfig' on the go but without updating LUT to save calibration time.

    In your customer case, how much is SPI overhead which force you to go for new profile? And in most of the usecase 4 profiles are sufficient to cater the application requirement, could you find out reason/usecase for additional profile?


    Regards,
    Jitendra
  • Hi Jitendra,

    Thank you for your reply. You are right in a lot of applications in ADAS sensors, 4 waveform profiles may be sufficient. But if I need more than 4, I will have to replace one or more of the 4 profiles in the profile RAM. In a beam steering radar, I am not interrogating the entire field of view at once. If I have to change profiles, I need to rewrite the profile, chirp, frame and frame trigger messages which becomes up to 600 us of overhead.

    if there was a way to store more profiles, then at boot up I can load all of them and during run time, just use the frame config message to transmit the different profiles.

    Regards,

    RJ
  • Hello RJ,
    Currently there is no way to store more than 4 profile in the device. You need to use existing APIs and add intelligence to achieve this usecase.
    However we are working on to optimize the time updating the configuration (chirp/profile/frame).

    Further could you help us about number of SPI interface you are using at Host side and are those slave/master are configured at same time or in serial?


    Regards,
    Jitendra
  • Hi Jitendra,

    Sorry for the delay in responding to your question. I look forward to the optimization on the AWR side. Currently the profile_cfg and chirp_cfg messages can be pipelined for the next upcoming frame while the current frame is ongoing. The frame_cfg cannot be updated while the current frame is ongoing.

    We have a cascaded system with greater than 4 AWRs. I cannot divulge the actual number on this public forum due to propriety reasons. We are doing parallel writes to the AWRs as serial would be very prohibitive for us.

    Regards,

    RJ
  • Thanks RJ. Tune in for furture DFP releases which may have optimization patches/solution for SPI communication.
  • Thanks Jitendra. I will keep an eye on the upcoming DFP releases.

    Regards,

    RJ