Hello,
Q1]
From the AWR1243 document,
Chip-to-chip cascading synchronization signals:
FM_CW_CLKOUT B15 O 20-GHz single-ended output. Modulated waveform
FM_CW_SYNCIN1 B1 I 20-GHz single-ended input. Only one of these pins should be
FM_CW_SYNCIN2 D15 I used. Multiple instances for layout flexibility.
FM_CW_SYNCOUT D1 O 20-GHz single-ended output for onboard loopback if desired
System synchronization:
SYNC_OUT P11 O Low-frequency synchronization signal output
SYNC_IN N10 I Low-frequency synchronization signal input.
a) What is the FMCW_SYNC signal and how different it is from the FMCW CLKOUT which is the actual FMCW chirp signal (ANALOG) ?
b) What is the SYNCIN signal running low frequency? I think it should be the one for frame and ADC sampling trigger but not sure. Is it from frame counter?
c) What is the SYNC (digital) related to FMCW_SYNC?
Q2] What would be the sequence for the TX and RX on/off?
4-chip cascade example,
a) what is the sequence of TX and RX?
b) what is the maximum possible simultaneous TX ON, in one chip or chip1 and chip2 at the same time, etc?
Thank you so much.
Best regards,