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AWR1642: L2 cache address

Part Number: AWR1642

Hello champion,
    If we enable the L2 cahce in 1642, what is the memory address range of the rest L2 RAM?  I can't find this description in the TRM. I have another question, what is the difference of L2 UMAP1 and L2 UMAP0? The cache is in UMAP0 or UMAP1?

Thanks,
Adam

  • Hello Adam,
    Only L2_UMAP0 can be assigned to cache/RAM where L2_UMAP1 can be only RAM.
    And out of 128KB of UMAP0 32/64/128KB can be convereted as cache and it'll occupy starting memory of UMAP0 but remaining UMAP0-RAM will have the starting address of 0x00800000.

    Regards,
    Jitendra