AWR1243: Can we control master chip's LO output in cascading?

Adam Yao94020

Genius 10910 points

Part Number: AWR1243

Hello,
When we use AWR1243P for cascading, can we control the ON/OFF and output power of LO in master chip?

Thanks,
Adam

over 7 years ago

0 Randy Rosales over 7 years ago

TI__Mastermind 18500 points

Hi Adam,

Based on reading through the AWR1xx_Radar_Interface_Control (ICD) document, the current firmware does not allow explicitly toggling LO output or controlling output power of the LO amplifiers.

However, switching between CASCADING_CFG = 0x0001 (cascade master mode) and CASCADING_CFG = 0x0000 (single-chip mode), will result in LO output being disabled from the master device. It will also toggle the input LO LNA off and switch the VCO output MUX path to non-cascade mode.

Please let me know if that answers your questions on this topic.

Thanks,
Randy

0 Adam Yao94020 over 7 years ago in reply to Randy Rosales

TI__Genius 10910 points

Hi Randy,
Thanks a lot for your reply.

Best regards,
Adam

0 Adam Yao94020 over 7 years ago in reply to Adam Yao94020

TI__Genius 10910 points

Hi Randy,
Is OSC_CLK_OUT (the 40Mhz clock) also enabled/disabled by this CASCADING_CFG setting?

Thanks,
Adam

0 Randy Rosales over 6 years ago in reply to Adam Yao94020

TI__Mastermind 18500 points

Hi Adam,

Yes, the OSC_CLKOUT path is enabled/disabled with the CASCADING_CFG setting.

I'm sorry I didn't see this sooner. Please open up a new ticket if you need an immediate response on something after you have closed the thread.

Thanks,
Randy

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AWR1243: Can we control master chip's LO output in cascading?