CCS/TDC7200: Trigger event with slow SPI Clock

Tool/software: Code Composer Studio

Hi everyone, My question is related to the trigger event. In the data sheet stands

After the start new measurement bit START_MEAS has been set in the CONFIG1 register, the TDC7200
generates a trigger signal on the TRIGG pin, which is typically used by the corresponding ultrasonic analogfront-
end (such as the TDC1000) as start trigger for a measurement (for example, transmit signal for the
ultrasonic burst)

For my application it is important that the trigger event starts after the SPI start sequence !!!! By coincidence I noticed that with a SPI clock of 6 MHz it happens that the trigger event already appears during the last clock cycle. If I configure the SPI frequency at 12 MHz then the trigger event will come after the last clock. Now my question is, how can be possible that the TDC knows, he has to send the trigger event even though the SPI sequence is not finished. The trigger event would have to be triggered even with slow SPI clock settings after the start bit has been set and not while the sequence is still running or not?

Yellow: SPI CLK

Green: Trigger Event

Pink: INTB

1. SPI Clock with 12 MHz.

2. SPI clock with 6 MHz.

Greets Ben