PGA970EVM: S2P, S2N is open-fault, but not AFEDIAG S2_FAULT OV asserted

Hi Yoshioka-san,

In the screenshot you are showing the AFEDIAG register which does not include the S2_FAULT OV bit. It is in the AFEDIAG1 register. If you are doing a read all command, then it is strange that it is not setting the bit in AFEDIAG1. However, if you are just reading the individual register, you will have to check the correct one to see the S2 OV fault.

Regards,

Hello Scott-san,

Thank you for your reply.

I am sorry, That was wrong screenshot.

It's exactly as you said, I have to check AFEDIAG1 register.

Again, AFEDIAG1 register value is below. 

Anyway, after read all button clicked, still S2 FAULT OV is not activated. 

By the way, I measured voltage values of AVDD pin and S2P pin  with respect to GND. 

The results is below.

AVDD :3.04V

S2P: 0.492V

In this case, EN_R_S2 register value is '1', but it seems to  S2P pin is not pulled up to AVDD voltage. 

To be S2P pin pulled up to AVDD, do I need another register configuration?

Thank you and best regards,

Takuto Yoshioka

Part Number: PGA970EVM

Hello, 

I  set EN_R_S1 and EN_R_S2  to '1` using PGA970EVM GUI.

Now the connection of between S1P and S1N, the connection between S2P and S2N , both are opened.

I believe that EN_R_Sx is set to '1', SxP pin and SxN pin are pulled up to AVDD.

Therefore in this case those voltage values is supposed to equal to AVDD. 

But on my PGA970EVM,  I measured voltage values of SxP pin, SxN pin, the values are less than 1[V]. 

On the other hand, AVDD pin  voltage value was measured at 3.04[V]. 

I want to SxP pin and SxN pin are pulled up  to AVDD.

I appreciate if  you give me a advice.

Thank you and best regards,

Takuto Yoshioka