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AWR1642: LVDS timings

Part Number: AWR1642

mmWave team,

In the AWR1642 datasheet, swrs203a, p.45, Figure 5-12 shows the following:

QUESTION: Where does the 60 ps clock jitter come from?  Is that part of the LVDS spec?

QUESTION: What are the two 200 ps timings just above the 1100 ps representing?

Thank you,

David

  • Hello David,
    The 60ps jitter limit comes from our LVDs IP design. The transmitter would have some jitter.
    The 200p sec in the timing is the minimum "open eye" region where the data would be stable for sampling.

    Regards,
    Vivek