Hi all,
in the datasheet of the IWR6843 was written that this chip is SIL2 Targeted. What it means?
Do you include or do you plan to add in the future a lockstep architecture for one or for both of the inside processors (DSP or ARM)?
I see that the chip has a lot of feature that can be used to identify a failure of some parts of it but to have a complete SIL2 system you need also that the processing has to be made in a lockstep architecture.
Thank you.
Alessandro.