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CCS/AWR1642: Range detection is abnormal

Part Number: AWR1642
Other Parts Discussed in Thread: TIDA-01570,

Tool/software: Code Composer Studio

Hi,

When we do the range detection by the mmWave studio, the scenario is as follows,

1. the max. range detection is set at 50m

2. Place one corner reflector in front of RADAR sensor, the distance is 5m and 10m

the result is :

For TI EVM:

5m corner reflector:

1D FFT  plot appears one peak at 5m

10m corner reflector:

1D FFT  plot appears one peak at 10m

Our RADAR board:

5m corner reflector:

1D FFT  plot appears two peaks at 5m and -20m (see the attached file, corner5m)

10m corner reflector:

1D FFT  plot appears two peaks at 10m and -15m  (see the attached file, corner10m)

Why does the minus range appear ? Could you provide the cause that results this phenomenon for us ?

Thanks

Michael Su   

  • Hi,
    There are several things that can create spurs on an RF board.

    Does your board follow same design as AWR1642BOOST board?

    Thank you
    Cesar
  • Hi Cesar,

    Our board design was followed the TI reference board, TIDA-01570

    FYI

    Thanks

    Michael Su

  • Hi Su,

    Have you experimented with the same scene using Complex1x sampling mode compared to the Complex2x mode you are showing here? I think we need to try and first determine if you are seeing additional reflections or spurs in the IF caused by another source.

    Thank you,
    -Randy
  • Hi Randy,

    We did the range detection test and used the Complex1x mode and Complex2x mode individually, the results are as follows,

    Please help check them

    Thanks

    Michael Su

    Corner reflector at 3m:

    complex1x mode:

    Complex2x mode:

    Corner reflector at 7m:

    Complex1x mode:

    Complex2x mode:

  • Hi Rnady,

    We found the LVDS lanes assigned to the connector is different between your EVM and reference board, TIDA-01570, could that will result this phenomenon ?

    Thanks

    Michael Su

  • Hi Michael,

    A few follow-up questions:


    1. Yes, the LVDS lane assignment will make a difference to data parsing. Please reference the AWR1xxx Data Path
    Programmer's Guide(SWRA555) www.ti.com/.../swra555.pdf. This describes how the data is ordered on the LVDS lanes and transfers. Data is output one RX at a time, with the sample buffer memory line split across the LVDS lanes. If you swap lanes, then you swap the first RX frame for the second.

    I don't know if there is a way to quickly re-order the data in Radar Studio GUI or the corresponding matlab data grapher. You can always write your own parser of the ADC binary file and re-order the data appropriately for your hardware though.


    2. Why are the reflector targets not on the zero-doppler bin in the 2D-FFT plot? Are these targets being moved relative to the radar during these measurements? As comparison, look at the very first plots you posted on this topic.

    Please let me know if that answers your question on this topic.

    Thank you,
    -Randy
  • Hi Randy,

    Thanks for your reply,

    Yes, the reflector target is moving

    Thanks

    Michael Su

  • Hi Randy,

    From the document, SWRA555, we still cannot understand what registers to be set to swap the LVDS lane order, could you figure them out to us?

    Thanks
    Michael Su
  • Hi Michael,

    I do not think there are any registers in AWR1642 to swap LVDS lane assignment. What I meant was that you had to interpret the data streams to account for your swapped lane assignment. The Radar Studio capture and graphing tool assume the same order as the EVM and DCA provides. Since your setup swaps Lane0 and Lane1 from this arrangement, you will have to swap those sample assignments to reconstruct the ADC data correctly. I do not see support for doing that manually in Radar Studio either so this is something you would have to author to read your ADC data .bin files.

    Please let me know if that makes sense.

    -Randy
  • Hi Randy,

    We re-order the data stream by matlab data grapher, the phenomenon disappeared

    Thanks

    Michael Su