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AWR1642BOOST: Continuous chirp transmission, without interframe time and without any processing on the board

Part Number: AWR1642BOOST
Other Parts Discussed in Thread: AWR1443BOOST, AWR1443

Greetings,

I was wondering if it is possible to implement in the AWR1642BOOST or AWR1443BOOST boards a firmware that transmits continuously a sequence of chirps, without any inter frame time, i.e. with a "duty cycle" close to 100% of chirp transmitting. Of course that would be without any signal processing done by the R4F or the DSP but I am not interested in that.

If there is a solution or a way to implement this, I would be thankfull.

Thanks in advance,

Regards,

Edgar

  • Edgar,

    The mmWaveLink documentation states the frame periodicity value have valid ranges from 1 ms to 1000 ms. These are limits that are defined in firmware and cannot be circumvented in your frame configuration. Therefore, what you are asking to do is not allowed on the AWR1642BOOST. You cannot implement a frame configuration with no inter frame time. This is a requirement of the DSS data path.

    Regards,
    Kyle
  • Kyle,
    Thank you very much for your reply. Now it is clear to me that there is no way to eliminate interframe time using this firmware.
    Do you think it is possible to manipulate the source code and flash a new firmware in order to minimize this interframe time, bearing in mind that it is not required any detection or processing?

    Best regards,
    Edgar
  • Edgar,

    The interframe time can be minimized by reducing the frame periodicity or increasing the length and/or number of chirps in each frame. This is something that is done in the configuration file and does not require a new firmware.

    Regards,
    Kyle
  • Kyle,

    I tried to do that manipulating the configuration file only, however it had some limits to the interframe time that I wanted to overcome. Eventually, using the AWR1443 I managed to edit the source code and built a new binary that did not had any processing done by the R4F which allowed me to minimize the interframe processing time down to around 70us.
    There is a field that is named interframe processing margin and its value is not very stable across frames, can you tell me what this field means and what causes it in the AWR1443 board?

    Thank you and regards,
    Edgar
  • Edgar,

    The inter frame processing margin is an output value that is part of the Stats structure that is sent out with each frame. This is not a value that you program in software.

    Please refer to the presentation below for more information: e2e.ti.com/.../mmw-Demo-Data-Structure_5F00_8_5F00_16.pdf

    Regards,
    Kyle
  • Kyle,

    Yes of course from the user perspective that is an output value given by the board. I understand that the interframe processing time is defined by the processing done by the processor or DSP, however I was wondering what is the origin of the interframe processing margin from a firmware perspective.
    Regards,
    Edgar
  • Edgar,

    For the DSP, you can use the Time stamp counter to benchmark your code, which are made up of the TSCH and TSCL registers. Please refer to this E2E thread for more information.

    e2e.ti.com/.../666503

    You can also refer to the following resources:

    TMS320C6000 Optimizing Compiler v8.1.x User Guide: www.ti.com/.../sprui04a.pdf

    Optimization Techniques for the TI C6000 Compiler: processors.wiki.ti.com/.../Optimization_Techniques_for_the_TI_C6000_Compiler

    Regards,
    Kyle