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PGA411-Q1: PGA411-Q1: Connect to external excitation signal, generated from another interface

Volker Bosch
Prodigy 20 points
Part Number: PGA411-Q1

Dear all,

I would like to use PGA411-Q1 to decode the resolver signals of a running system
(motor, resolver, inverter with resolver interface).

Is it possible to feed an external resolver excitation signal, provided by a
separate resolver interface into PGA411and the related sinus and cosinus signals?

I'd like to measure rotor angle and velocity of an existing drive system with is
provided with it's own resolver interface. I have access to the excitation signal,
sinus and cosinus signals.

Unfortunately I did not find any hints for this mode of operation in the PGA411's
user manual/datasheet. Would you please tell me the required PGA411 register
configuration?


Thank you very much!

Best regards,

Volker Bosch

  • 0
    TI__Mastermind 23810 points
    Volker,

    There are a few requirements for this:

    1.) The excitation frequency must still be within the PGA411's expected range (10kHz to 20kHz)
    2.) The external excitation signal must be scaled down (usually with a resistor divider) and then fed to the IEx inputs. There is a section in the datasheet that discusses the expected IEx signals.
    3.) autophase mode must be uses (versus manual phase mode)

    Note that the exciter amplifier will still run, and it will still expect a VEXT rail, which can be supplied by the PGA411's boost. There is no way to turn those off.
  • 0 in reply to Clancy Soehren
    Prodigy 20 points
    Hi Clancy,

    thank you for your reply -- now it works as intended, using factory default register settings!
    My mistake was to disable the PGA411's exciter system (and the related monitoring/fault handling).

    Sorry for not mentioning that I used two PGA411-Q1-Boards for my investigation, therefore signal frequency and levels should have met the requirements of the slave PGA411.

    One last question: What does the SENCLK bit in DEV_TLOOP_CFG register do? Based on the brief explanation in the user's manual "SENCLK == 0: Exciter Clock referenced to system Clk" I thought that setting this bit would be the right thing, when feeding an external excitation signal, as this will definitely not be in phase with the system Clock.

    Thank you (and TI) very much for your support -- and also for providing this wonderful integrated circuit which simplifies the design of my project quite a lot! :-)

    Best regards,

    Volker