Hello,
I am using a custom two-chip AWR1243 cascade board. I have ES2.0 AWR1243 devices running DFP 1.0.
When attempting to enable the cascade operation of the devices, I see that the CSI2 clock starts up, but no data is sent over the CSI2 interface.
This behavior seems to be only affected by the cascading_cfg field of AWR_CHAN_CONF_SET_SB. Keeping all other configuration the same,
- If I set that field to 0x0001 (cascade master), I get no data over the high-speed interface.
- If I set that field to 0x0000 (single chip), then everything else operates as expected.
What sort of issue could cause this behavior? Could it be an LO generation/distribution problem? On our board, the master connects FMCW_SYNCOUT to the slave's FMCW_SYNCIN2, and master's FMCW_CLKOUT to its own FMCW_SYNCIN2.
Thanks for your help.
Best,
Antonio