Dear TI Support,
We are following the AWR1243BOOST test procedures in HardwareDesignChecklist, document swrr152. In Test T4-3:
Two questions:
1. Can you describe how to "enable the test mode to send 1.8Ghz APLL clock out on OSC_CLK pin"?
2. Are there any updates to document swrr152?
Thank you,
mmUser