Team,
I have a customer designing with HDC2010, and they had several questions surrounding the device:
They are manually triggering the device by writing 0 to addr 0xF. The DS says this bit is said to be auto cleared when measurement is done. Given this, what is the purpose of DRDY bit , bit 7 addr 0x04 in this use case? How does the DRDY bit work with the auto measure, which they can set in bit [6:4] addr 0x0E? For example, let say I set to auto measure to be 5 sample per second, how is the DRDY going to behave? What is not clear to me is for example let say one measure was done and second is start and in between I didn’t read that DRDY will be set due to the first finish but actually we are now in middle of second read.
As you see from above, it is not clear to the customer how the DRDY sequencing is supposed to be used/work. Can you walk through this process?
- They are also not clear what the purpose of the offset is, as the user already needs to do some calculation to get the temp and humidity. Therefore, it is not like the value they read is already final and as such offset can compensate so read is easy. Can they not just calibrate out the offset in the digital realm when they perform the math needed?
There is a soft reset bit 7 addr 0x0E but it is not cleared when do I need to use it ?
What can cause the chip to stop working and require soft reset ?
Also it said to be auto clear does it mean once it clear I can immediately issue new I2C access or is there any delay needed and if so how long ?
When using the manual trigger in bit 0 addr 0x0F what happen if a new trigger is issue while the prior one was not finished yet ?
Finally, they believe there is typo, as the reset value in register 0xFC and 0xFD don’t match the 16 bit representation you show for the ID in 7.6.18. Can you share which one is the correct the representation or the reset.
