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MMWAVEICBOOST: LVDS Interface to the DCA1000

mvengineer
Prodigy 100 points
Part Number: MMWAVEICBOOST
Other Parts Discussed in Thread: IWR6843, IWR6843ISK, , AWR1843

I am currently looking to pull the LVDS interface from the MMWAVEICBOOST + IWR6843ISK through J10 to another FPGA development board different from the recommended DCA1000. I plan on building a custom cable which will pull the LVDS signals and clock to interface them to the new development board. I've been looking for relevant information on the LVDS specs on the IWR6843, but could not find any electrical characteristics, in order to properly interface to the new FPGA. Is there a spec for the LVDS input/output voltage levels?

  • 0
    TI__Mastermind 25835 points
    Hello,

    LVDS interface is used only as Debug interface. Datasheet provides electrical specs under "5.10.4 LVDS Interface Configuration" .
    LVDS are transmitter hence there is no specification on the input side, Only output electrical specs are specified.

    Thanks and regards,
    CHETHAN KUMAR Y.B.
  • 0 in reply to CHETHAN KUMAR Y.B.
    Prodigy 100 points

    Thank you for the update. I had one other question.

    Are there any critical driving signals on J10 (going to the DCA1000) beyond the LVDS lines that we need to address on our custom FPGA board? There are Data Modification Modules signals that are coming from the Lattice FPGA. Do these signals serve a specific purpose for the AWR1843?

  • 0 in reply to mvengineer
    TI__Mastermind 25835 points
    Hello,

    Apart from the LVDS interface, There are UART interface RS232_TX/RS232_RX, nRESET, SOP lines needed to be driven externally.
    This is needed for loading the firmware to the device and configuration the boot modes.

    Data Modification Modules (DMM) would be used as hardware in loop function. You could play back captured ADC samples into the device.
    If you do not want to use the Hardware in loop function then you don't have to use DMM signals.

    Thanks and regards,
    CHETHAN KUMAR Y.B.