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CCS/PGA900EVM: How to measure negative signal in 16bit ADC mode?

Part Number: PGA900EVM

Tool/software: Code Composer Studio

Hi

I notes that PGA900  firmware guide said 24 bit ADC compensation algorithm is not supported.

So I have to use 16bit ADC. Then I find that  DAC output of negative signal is much bigger than positive signal.

For example, 3mv positive signal(1.25V common mode voltage) have 1.5V output, but 3mv negative signal (-1.25V common mode voltage) have 4.2V DAC output.

Is the compensation algorithm can't support measure negative signal?

 

  • Hello,

    The compensation algorithm must be written by the user. It can support negative signals if you configure it to do so.

    In your example of the DAC output responding strangely to your inputs, what is your function for the DAC output based on the ADC code? It seems like it is inverted. If your full scale output range is from 0-5V, then an input of 0mV should put your output at 2.5V, and you would expect a positive 3mV to have an output above 2.5V, and a negative 3mV input to have an output below 2.5V.

    Also, was there a typo in your response, or with your negative signal do you actually have a -1.25V common mode voltage? I would expect the common mode voltage to be the same in both cases.

    Regards,