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IWR1443: Powering IWR1443 with LP87524P

Part Number: IWR1443
Other Parts Discussed in Thread: AWR1243

Hello,

I noticed for LP87524P, the output voltages are 1V, 1.2V, 1V, and 1.8V.

According Table 5-1 (Iwr1443 datasheet), IWR1443 chip requires 1.8V, 1/1.3V, 3.3/1.8V, and 1.2V.

1) How are the power rails of the IWR chip connected to LP87524P? Are the 1V providing the two RF sections? Is 1.8V providing power to both digital and VCO/CLK...?

2) If the 1.8V is providing power to both digital and VCO/CLK/IF_AMPs, should we concerned about noise?

3) If we want to run the Digital I/O of IWR chip at 1.8V, are there modifications in firmware that need to happen or does it automatically switch from 3.3V to 1.8V mode?

Thanks,

Faiz

  • Hello Faiz,

    1) LP87524P PMIC developed mainly targetting AWR1243P cascaded application in mind, where in one LP87524P drives two AWR1243 devices.
    As 1V rail needs 2.5A current/device for two devices 5A current would be needed and it would be difficult to provide from the single 1V rail hence two DCDCs would support 1V rail, And 1.2V/1.8V rails drives two chips as it is. 3.3V is derived from external LDO from 5V input to LP87524P.
    For Single chip IWR1443 you could look for LP87524J version of PMIC. Below app-note gives more details on the power management solutions
    www.ti.com/.../swra577.pdf

    2) For Noise filtering there are additional LC filters are employed; You could refer above appnote, This also provides measurement details with the filters and trade-off with LDO based solution

    3) VIO supply would decide which supply domain chip need to operate if it's 3.3V all the I/Os would operate in 3.3V, If it's 1.8V then all the I/Os would operates in 1.8V. However care need to be taken all the I/Os are also operating in the same supply domain, i.e. QSPI Flash, CAN drivers, SPI/UART, XDS110 peripherals.

    Thanks and regards,
    CHETHAN KUMAR Y.B.