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Original question:

AWR1843: How to select the BSS patch version when building the 1843 MRR demo

AWR1843: How to turn off Tx/Rx channel in inter-frame period?

Adam Yao94020
Genius 10910 points
Part Number: AWR1843
Other Parts Discussed in Thread: TIDEP-0091, IWR1443

Hi champion,
    Customer want to turn off Tx and Rx channels in inter-frame idle period to save power. They tried to call rlSetChannelConfig, but find after they open the channels in the next frames, the ADC data is all zero.
    Could you help to check is there any way to reduce the power in inter-frame period? Can we close the Tx and Rx channel in this period?

Thanks,
Adam

  • 0
    TI__Guru*** 148244 points
    Adam,

    Rx/Tx are not active during inter-frame period. Most of the power is consumed during the active chirping time.

    We will look into the configuration available for the device and will get back to you

    thank you
    Cesar
  • 0
    TI__Mastermind 29985 points
    Hello Adam,

    By default the dynamic power save should disable these blocks during the inter-frame period. You should not need to modify anything to enable this feature.

    Regards,

    Adrian
  • 0 in reply to aozer
    TI__Genius 10910 points
    Cesar, Adrian,
    Even we do dynamic power saving during inter-frame period, the static power consumption of Tx and Rx channel is still considerable, so customer want to call rlSetChannelConfig to close these channels after frame active time. The test results show this way reduce power a lot, but the problem is when they call rlSetChannelConfig to open these channels again, they get all zero ADC data.
    Let's check if these is any problem in this procedure.

    Thanks,
    Adam
  • 0 in reply to Adam Yao94020
    TI__Mastermind 29985 points
    Hello Adam,

    Are they calling an rlRfInit after? RF Init needs to be done after channel config.

    Regards,

    Adrian
  • 0 in reply to aozer
    TI__Genius 10910 points

    Hello Adrian,
        Thanks for your reply, I will let customer try it and get back to you.

    Best regards,
    Adam

  • 0 in reply to Adam Yao94020
    TI__Mastermind 29985 points
    Hello Adam,

    You may need to call rlSetAdcOutConfig and rlAppLowPowerConfig as well before the RF Init. So, flow would be

    > rlSetChannelConfig
    > rlSetAdcOutConfig
    > rlAppLowPowerConfig
    > rlRfInit

    Regards,

    Adrian
  • 0 in reply to aozer
    TI__Genius 10910 points

    Hello Adrian,
        Thanks for your reply. Can customer use this API sequence to disable the Tx/Rx channel in inter-frame period and then enable these channels before the start of next frame? Can this reduce some power consumption? 
        Do you have any other suggestion on reduce AWR1843 power consumption?

    Thanks,
    Adam

  • 0 in reply to Adam Yao94020
    TI__Mastermind 29985 points
    Hello Adam,

    That sequence should allow you to re-enable the TX/RX channels after disabling them. Whether or not disabling will save much power is something that we have not tested. Since the dynamic power save should already disabled most of the internal blocks of the TX/RX there may not be much power saved by disabled the TX/RX manually.

    Besides the power save features that are already enabled in the FW, you can take a look at the TIDEP-0091, which describes using an MSP432 to emulate a sleep mode for the device when not in use. This is designed for the IWR1443 for level sensing applications, but you may be able to use some of the same concepts to implement power saving features on AWR1843 for you desired application. Beyond these, we have not studied in depth any other power saving techniques for these devices.

    www.ti.com/.../tidud26b.pdf

    Regards,

    Adrian
  • 0 in reply to aozer
    TI__Genius 10910 points

    Hi Adrian,
       Thanks for your reply!
       Could you help to check one additional question? If we enabled two Txs, but use TDM mode to transmit one TX in a chirp, then another Tx in the second chirp. Will the un-transmitted Tx's internal blocks be closed?

    Thanks,
    Adam

  • 0 in reply to Adam Yao94020
    TI__Genius 10910 points

    Hi Adrian,

       Customer tried this method today, they followed the exactly the same API sequence, but got errors as below.

  • 0 in reply to Adam Yao94020
    TI__Guru*** 148244 points
    Hi Adam

    I checked with design team. The analog logic is turned off during the interframe period. There is no need to do that with SW, it is performed by default

    There are two configuration options to reduce power

    1) LOWPOWERMODE

    This is static device configurations (applicable for this power cycle) - Sigma
    Delta ADC root sampling clock rate (reducing rate to half to save power in small IF bandwidth
    applications).


    2) DYNAMICPOWERSAVE
    This sub block defines static device configuration - whether to enable dynamic power saving
    during inter-chirp IDLE times by turning off various circuits e.g. TX, RX, LO Distribution blocks. If
    Idle time + Tx start time < 10us or Idle time < 3.5us then inter-chirp dynamic power save option
    will be disabled, in that case, 15us of inter-burst idle time will be utilized to configure sequencer
    LO, TX and RX signal timings by firmware.

    Thank you
    Cesar