This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/AWR1642BOOST: capture demo

Part Number: AWR1642BOOST
Other Parts Discussed in Thread: AWR1642

Tool/software: Code Composer Studio

Question 1:
The documents show that the DDR data rate is twice the value of the Clock (e.g., 150 Mbps (75-mhz DDR Clock)). Is the data rate of SDR equal to the Clock rate?
Question 2:
Capture demo code has a DDR clock mux. What does this mean? Should it be in line with the DDR clock Settings?
Question 3:
In the capture demo, are the ADC buffer headers in the continuous mode of the LVDS data stream present on every transmission, or are they only present on the first transmission?
Question 4:
If you run capture demo's LVDS continuous flow mode, is board fever normal?
Question 5:
How can I change the LVDS clock rate in capture demo to a value that is not optional in demo?

  • Hi,
    Q1,Q2: Do I know what is the motive of this question? Is Host or capture device have mismatched clock what AWR1642 is capable of?

    Q3: it'll update L3 memory for once with the ADC data. But while streaming it's continuous.
    Q4: Device's temperature depends on the duty cycle you use for chirping and streaming. Idle time for every chirp and frame can give time to device to cool down at every cycle.
    Q5: Please refer the source file where it does the LVDS (CBUFF) configuration. capture_common.c: CaptureDemo_configureStreaming

    Regards,
    Jitendra