Other Parts Discussed in Thread: UNIFLASH
Steve, need your urgent help
Getting further but still having unexpected results while writing to the PGA via SPI. I can write and read the DIG_IF_CTRL and MICRO_INTERFACE_CONTROL registers with the expected results. I have a routine that writes to FRAM and then reads back the values which works fine as long as I don't power off the chip. If I power off the chip and try to read the values, I get FFs . Yes I set the above registers at boot time to put the proc in reset. If I re-write the FRAM and check so long as I don't power down ( I can even hard reset the slave cpu) then I can read the FRAM results without having to rewrite them. I checked the REMAP register and get 0x00 as expected. One note is that I read the PSMON1 and PSMON2 and get 0xa8 and 0x18 respectively. I checked all the external bypass cap voltages and they are correct.
The FRAM_STATUS register is 0x00 however I found the following errors in the PDF:
P 62, 7.6.2 the CLK and FRAM_STATUS registers have the same offset but different M0 address.
P 42 section 7.3.1.14.3.3 in the table the line for Read FRAM byte 7 has the page address as 101 where it should be 100 if REMAP is 0 or 011 with REMAP 1
Lastly if I try to write to the DEV_RAM in the same way as the FRAM, I get all zeros no matter what. My page addresses are:
#define DI_PAGE_ADDRESS_DEV_RAM 0x03
#define DI_PAGE_ADDRESS_FRAM 0x04
I behind on a customer design so any help or suggestions would be welcome. Are there tests or areas I can read to verify communication?
Thanks, Ken